Using machine learning to characterize L2 cache behavior of programs on multicore processors

Abstract

Contention for shared L2 caches between the programs running on multicores has been a problem degrading the performance. Potential solutions proposed by researchers to alleviate the problem include scheduling policies at the level of operating systems and cache partitioning policies at the level of hardware. At the core of framing policies to manage the contention lies knowing the characteristics of a running program with reference to its utilization of shared L2 caches. In this work we study the L2 cache behavior of the programs by collecting various performance events from hardware performance counters on Intel quad-core Xeon X5482 processor. We used machine learning to derive the model to predict the L2 cache behavior (solo run L2 cache stress) of the program. We obtained the results with correlation coefficient 0.99, mean absolute error 0.75 and root mean squared error 1.24. During the work we observed that the selection of attributes plays a significant role in the success of a machine learning algorithm.