Characterizing L2 cache behavior of programs on multi-core processors: Regression models and their transferability
Characterizing L2 cache behavior of programs on multi-core processors: Regression models and their transferability
| dc.contributor.author | Rai, Jitendra Kumar | |
| dc.contributor.author | Negi, Atul | |
| dc.contributor.author | Wankar, Rajeev | |
| dc.contributor.author | Nayak, K. D. | |
| dc.date.accessioned | 2022-03-27T06:01:38Z | |
| dc.date.available | 2022-03-27T06:01:38Z | |
| dc.date.issued | 2009-12-01 | |
| dc.description.abstract | In this study we investigate the transferability of trained regression models to estimate solo run L2 cache stress of programs running on multi-core processors. We used machine learning to generate the trained regression models. Transferability of a regression model means how useful is a regression model (which is trained on one architecture) to predict the solo run L2 cache stress on another architecture. The statistical methodology to assess model transferability is discussed. We observed that regression models trained on a given L2 cache architecture are reasonably transferable to other L2 cache architecture and vice versa. ©2009 IEEE. | |
| dc.identifier.citation | 2009 World Congress on Nature and Biologically Inspired Computing, NABIC 2009 - Proceedings | |
| dc.identifier.uri | 10.1109/NABIC.2009.5393643 | |
| dc.identifier.uri | http://ieeexplore.ieee.org/document/5393643/ | |
| dc.identifier.uri | https://dspace.uohyd.ac.in/handle/1/9140 | |
| dc.title | Characterizing L2 cache behavior of programs on multi-core processors: Regression models and their transferability | |
| dc.type | Conference Proceeding. Conference Paper | |
| dspace.entity.type |
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