Hardware implementation of multi-objective differential evolution algorithm: A case study of spectrum allocation in cognitive radio networks
Hardware implementation of multi-objective differential evolution algorithm: A case study of spectrum allocation in cognitive radio networks
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Date
2017-01-01
Authors
Anumandla, Kiran Kumar
Peesapati, Rangababu
Sabat, Samrat L.
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Journal ISSN
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Abstract
In this paper, a hardware solution for multi-objective differential evolution (MODE) algorithm is presented. The proposed hardware is developed as a co-processor and interfaced with PowerPC440 processor of Virtex-5 field programmable gate array to accelerate execution speed on an embedded platform. It is validated by optimising four standard benchmark functions and its execution time is compared with the same algorithm running on a 32-bit PowerPC440 processor. Further, as a case study, the proposed hardware is used to solve Spectrum Allocation (SA) problem in Cognitive Radio Network (CRN). In CRN, the available licensed channels are assigned to cognitive users using SA task while satisfying the multiple objectives posed by licensed users. The MODE core is integrated with the SA objective functions and developed as a MODE-based SA (MODE-SA) co-processor on an embedded platform for distributed CRN. The MODE-SA core has attained a speedup of 50-60× compared to the PowerPC440 implementation.
Description
Keywords
Auxiliary processor unit,
Cognitive radio,
FPGA,
Hardware accelerator,
MODE,
Multi-objective differential evolution,
Network utility functions,
Pareto front,
Spectrum allocation,
System on chip
Citation
International Journal of Innovative Computing and Applications. v.8(4)