Reliable high speed data acquisition system using FPGA

Abstract

This paper presents design and implementation of a Data Acquisition System (DAS) in Field Programmable Gate Arrays (FPGA) using System on Chip (SoC) methodology. To ensure the reliability of data being transmitted over the Channel, a suitable framing interface along with error detection is proposed and interfaced with Xilinx Aurora IP core. The proposed DAS is capable of transmitting the data a 1.25 Gbps over the channel. The main advantage of the proposed DAS is that the configuration and monitoring is done using the in-built PowerPC processor of FPGA through Universal Synchronous Asynchronous Receiver Transmitter (UART). This type of DAS is suitable for multi channel acoustic data acquisition and in Electronics Warfare systems. © 2009 IEEE.